last modified on Monday Jun 19, 2006
Home





















 

 


Links
CODES+ISSS 2006
CODES+ISSS 2005
CODES+ISSS 2004
ESTIMedia 2006
ESTIMedia 2005
ESTIMedia 2004

  Instructions for preparing camera-ready manuscripts
 
Camera-ready paper and poster preparation guidelines:

The camera-ready version of your manuscript should conform to IEEE proceedings format (two column format, single spaced, 10pt font) and should be of at most 6 pages, including all figures and references. Please note this this restriction will have to be strictly enforced and it will NOT be possible to purchase additional pages. Latex style files conforming to IEEE proceedings format may be downloaded from here.

Please fax a signed IEEE copyright form to the following fax number: (+65) 6779 4580 (Attn: Prof. Samarjit Chakraborty). The camera-ready manuscript in pdf format may be uploaded by the paper submission website of ESTIMedia.

Each paper is required to have at least one registration at the workshop. So please ensure that at least of the co-authors of each paper registers and presents the paper at the workshop. The details of the registration and hotel booking may be found from the ESWeek 2007 webpage.

Deadline for submitting the camera-ready manuscript, signed copyright form and pre-registration at the workshop is: August 22, 2007.

Following the ESTIMedia tradition, all paper presentations (talks) will be accompanied by poster sessions to allow for better interactions. We suggest that you prepare and bring along with you at the workshop one A1-sized poster providing an overview of your paper. Boards for setting up these posters will be provided by the workshop organizers.

  List of Accepted Papers
Paper id Paper Title
R-2 A Quick Safari Through the MPSoC Run-Time Management Jungle
R-3 Actor-Oriented Modeling and Simulation of Sliding Window Image Processing Algorithms
R-4 Signature-based Microprocessor Power Modeling for Rapid System-level Design Space Exploration
R-6 Design and Implementation of a Multithreaded High Resolution MPEG4 Decoder on Sandblaster DSP
R-8 Run-time Task Overlapping on Multiprocessor Platforms
R-9 Code Placement for Reducing the Energy Consumption of Embedded Processors with Scratchpad and Cache Memories
R-11 MP-Queue: an Efficient Communication Library for Embedded Streaming Multimedia Platforms
R-13 Network Calculus Applied to Verification of Memory Access Performance in SoCs
R-14 Leveraging Predicated Execution for Multimedia Processing
R-15 Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
R-16 Adaptive mapping to resource availability for dynamic wavelet-based applications
R-17 Component based library implementation of abstract data types for resource management customization
R-18 Optimized Application Architecture of the H.264 Video Encoder for Application Specific Platforms
R-20 Embedded Low Complexity JPEG2000 Videocoding System
R-22 Impact of Task Migration on Embedded Streaming Multimedia for Embedded Processors
R-24 A Modular Suite for High-Definition Image Processor Co-Verification
R-25 Performance Analysis of Parallel Execution of X.264 Encoder on the Cell Processor
R-26 Data-Parallel Code Generation from Synchronous Dataflow Specification of Multimedia Application
R-30 Interposing Flash between Disk and DRAM to Save Energy for Streaming Workloads