Real-time & Embedded Software Analysis - primarily WCET analysis

 

2012

 

[RTAS]

A Unified WCET Analysis Framework for Multi-core Platforms ( PDF )
Sudipta Chattopadhyay, Chong Lee Kee, Abhik Roychoudhury, Timon Kelter, Peter Marwedel and Heiko Falk
18th IEEE Real-time and Embedded Technology and Applications Symposium (RTAS) 2012.

 

 

2011

 

[RTSS]

Scalable and Precise Refinement of Cache Timing Analysis via Model Checking ( pdf )

Sudipta Chattopadhyay and Abhik Roychoudhury

IEEE Real-time Systems Symposium (RTSS) 2011. Best paper Award nomination.

 

[RTSS]

Timing Analysis of a Protected Operating System Kernel ( pdf )

Bernard Blackham, Yao Shi, Sudipta Chattopadhyay, Abhik Roychoudhury and Gernot Heiser

IEEE Real-time Systems Symposium (RTSS) 2011.

 

[ECRTS]

Bus-Aware Multicore WCET Analysis through TDMA Offset Bounds ( pdf )

Timon Kelter, Heiko Falk, Peter Marwedel, Sudipta Chattopadhyay and Abhik Roychoudhury

23rd Euromicro Conference on Real-time Systems (ECRTS) 2011.

 

[RTAS]

Scope-aware Data Cache Analysis for WCET Estimation [ Paper, Technical Report with all proofs ]
Bach Khoa Huynh, Lei Ju and Abhik Roychoudhury
17th IEEE Real-time and Embedded Technology and Applications Symposium (RTAS) 2011. Best paper Award nomination.

 

[LCTES]

Static Bus Schedule aware Scratchpad Allocation in Multiprocessors [ Paper ]
Sudipta Chattopadhyay and Abhik Roychoudhury
ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES) 2011.

 

 

2010

 

[SCOPES]

Modeling Shared Cache and Bus in Multi-cores for Timing Analysis (PDF)

Sudipta Chattopadhyay, Abhik Roychoudhury and Tulika Mitra

13th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2010.

 

[DAC]

Timing Analysis of Esterel Programs on General-purpose Multiprocessors

Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury and Samarjit Chakraborty

ACM Design Automation Conference (DAC) 2010.

 

[TOPLAS]

Scratchpad Allocation for Concurrent Embedded Software ( PDF )
Vivy Suhendra, Abhik Roychoudhury and Tulika Mitra
ACM Transactions on Programming Languages and Systems (TOPLAS), 32(4), April 2010.

 

[DAES]

Cache-aware Optimization of BAN Applications ( PDF )
Yun Liang, Lei Ju, Samarjit Chakraborty, Tulika Mitra and Abhik Roychoudhury
Design Automation for Embedded Systems, Springer, To appear.
(Special issue for selected papers from CODES-ISSS 2008)

 

 

2009

 

[RTSS]

Unified Cache Modeling for WCET Analysis and Layout Optimizations ( PDF )
Sudipta Chattopadhyay and Abhik Roychoudhury
IEEE Real-time System Symposium (RTSS) 2009.

 

[RTSS]

Timing Analysis of Concurrent Programs Running on Shared Cache Multi-cores ( PDF )
Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra and Abhik Roychoudhury
IEEE Real-time System Symposium (RTSS) 2009.

  Embedded Systems and Software Validation
                 Abhik Roychoudhury                                                                   
                 New Book from Elsevier (formerly Morgan Kaufmann), 2009.

[RTSJ]

Cache-aware Timing Analysis of Streaming Applications ( PDF )
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele

Real-time Systems Journal, 41(1), 2009. (Special issue for selected papers from ECRTS 2007)

 

[DAC]

Generating Test Programs to Cover Pipeline Interactions (PDF) [Best Paper nomination]
Thanh Nga Dang, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra
ACM Design Automation Conference (DAC), 2009.

 

[DAC]

Context-Sensitive Timing Analysis of Esterel Programs (PDF)

Lei Ju, Bach Khoa Huynh, Samarjit Chakraborty and Abhik Roychoudhury

ACM Design Automation Conference (DAC) 2009, [Short Paper].

 

 

2008

[CODES_ISSS] Performance Debugging of Esterel Specifications ( PDF )
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury and Samarjit Chakraborty
ACM Intl. Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2008.

[CODES-ISSS] Scratchpad Allocation for Concurrent Embedded Software ( PDF )
Vivy Suhendra, Abhik Roychoudhury and Tulika Mitra
ACM Intl. Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2008.

[CODES-ISSS] Cache-aware Optimization of BAN Applications  ( PDF )  (Best Paper nomination)
Yun Liang, Lei Ju, Samarjit Chakraborty, Tulika Mitra and Abhik Roychoudhury
ACM Intl. Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2008.

[RTAS] Schedulability analysis of MSC-based system models ( PDF )
Lei Ju, Abhik Roychoudhury and Samarjit Chakraborty
IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS) 2008.

 

2007

 

Chronos: A Timing Analyzer for Embedded Software ( PDF )
Xianfeng Li, Yun Liang, Tulika Mitra and Abhik Roychoudhury
Science of Computer Programming, Volume 69, December 2007.

 

[ECRTS] Cache-aware Timing Analysis of Streaming Applications ( PDF ) (Best Paper nomination)
Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele, Unmesh Bordoloi and Cem Derdiyok
19th Euromicro Conference on Real-time Systems (ECRTS) 2007.  

 

Worst-case Execution Time and Energy Analysis
Tulika Mitra and Abhik Roychoudhury
Chapter in the Compiler Design Handbook, Y.N. Srikant and Priti Shankar Editors, 2007.

[DATE] Accounting for Cache-related Preemption Delay in Dynamic Priority Schedulability Analysis ( PDF )

Lei Ju, Samarjit Chakraborty, Abhik Roychoudhury

Design Automation and Test in Europe (DATE) 2007.

 

[ASP-DAC] A Retargetable Software Timing Analyzer using Architecture Description Language

Xianfeng Li, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra, Xu Cheng

Asia and South Pacific Design Automation Conference (ASP-DAC) 2007.

 

[WCET] Timing Analysis of Body Area Network Applications
Yun Liang, Abhik Roychoudhury and Tulika Mitra
7th Int'l Workshop on Worst-Case Execution Time (WCET) Analysis, 2007.

 

2006

 

Modeling Out-of-Order Processors for WCET Analysis ( PDF )
Xianfeng Li, Abhik Roychoudhury and Tulika Mitra
Real-Time Systems Journal, Springer, 34(3), pages 195-227, 2006.
A much expanded version of our RTSS 2004 paper on the same topic.

Efficient Detection and Exploitation of Infeasible Paths for Software Timing Analysis ( PDF)
Vivy Suhendra, Tulika Mitra, Abhik Roychoudhury and Ting Chen
ACM Design Automation Conference (DAC) 2006.

Handling Constraints in Multi-objective GA for Embedded System Design,

Biman Chakraborty, Ting Chen, Tulika Mitra, Abhik Roychoudhury

IEEE Intl. Conf. on VLSI Design, 2006.

 

2005

 

WCET centric data allocation to scratchpad memory (  PDF )

Vivy Suhendra, Tulika Mitra, Abhik Roychoudhury and Ting Chen

IEEE Real-Time Systems Symposium (RTSS) 2005.

 

UML based Modeling of Process Classes for System Level Design,   
Ankit Goel, K.D. Nguyen, Abhik Roychoudhury and P.S. Thiagarajan,
DAC 2005 Workshop on UML for SoC Design, June 2005.

 

Exploiting Branch Constraints without Explicit Path Enumeration

Ting Chen, Tulika Mitra, Abhik Roychoudhury and Vivy Suhendra

5th International Workshop on Worst-Case Execution Time Analysis (WCET), July 2005.

Analyzing Loop Paths for Execution Time Estimation,
Abhik Roychoudhury, Tulika Mitra, Hemendra Singh Negi,
ICDCIT 2005, LNCS 3816, Springer Verlag.

 

Modeling Control Speculation for Timing Analysis (PDF),
Xianfeng Li, Tulika Mitra and Abhik Roychoudhury
Real-Time Systems Journal, Kluwer Academic Publishers, 29(1), Jan 2005.
A much expanded version of ISSS 2002 and DAC 2003 papers.

 

2004

 

Automatic Generation of Protocol Converters from Scenario-based Specifications (PS)
Abhik Roychoudhury, P.S. Thiagarajan, Tuan Anh Tran and Vera A. Zvereva
IEEE Real-Time Systems Symposium (RTSS) 2004.

 

Modeling Out-of-Order Processors for Software Timing Analysis (PDF),
Xianfeng Li, Abhik Roychoudhury and Tulika Mitra
IEEE Real-Time Systems Symposium (RTSS) 2004.

 

Design Space Exploration of Caches using Compressed Traces, (PDF)
Xianfeng Li, Hemendra Singh Negi, Tulika Mitra and Abhik Roychoudhury
ACM International Conference on Supercomputing (ICS) 2004.
 

Simplifying WCET Analysis by Code Transformations,
Hemendra Singh Negi, Abhik Roychoudhury, Tulika Mitra,
 4th International Workshop on Worst-Case Execution Time Analysis (WCET), June 2004.

 

2003

Accurate Timing Analysis by Modeling Caches, Speculation and their Interaction, (PDF)
Xianfeng Li, Tulika Mitra and Abhik Roychoudhury
ACM/IEEE Design Automation Conference (DAC) 2003, pages 466-471.

Accurate Estimation of Cache-related Preemption Delay, (PS, PDF)
Hemendra Singh Negi, Tulika Mitra and Abhik Roychoudhury
ACM Intl. Conf. on Hardware/Software Codesign and System Synthesis (CODES+ISSS) 2003..

Using formal techniques to Debug the AMBA System-on-Chip Bus Protocol, (PDF)
Abhik Roychoudhury, Tulika Mitra and S.R. Karri
IEEE/ACM Conference on Design Automation and Test in Europe (DATE) 2003.

Communicating Transaction Processes, (PS)
Abhik Roychoudhury and P.S. Thiagarajan
IEEE International Conference on Application of Concurrency in System Design (ACSD) 2003.

2002

Timing Analysis of Embedded Software for Speculative Processors, (PDF)
Tulika Mitra, Abhik Roychoudhury and Xianfeng Li
ACM International Symposium on System Synthesis (ISSS) 2002, pages 126-131.

A Framework to Model Branch Prediction for WCET Analysis, (short version,  long version  )
Tulika Mitra, Abhik Roychoudhury,
2nd Workshop on Worst Case Execution Time Analysis (WCET), Austria, June 2002. Also available as NUS Technical Report 11-01.