Guanwen (Henry) Zhong (钟冠文)

PhD. Candidate

School of Computing

National University of Singapore




Guanwen (Henry) Zhong is a fifth-year PhD. student in the School of Computing, National University of Singapore (NUS). His supervisor is Prof. Tulika Mitra. Before joining NUS, he received B.Eng. degree in Microelectronics from Sun Yat-sen University, China. His research work is mainly focused on design space exploration for hardware/software co-design on embedded FPGA-based heterogeneous System-on-Chip architectures.

Research Interests: Design space exploration on heterogeneous MPSoC architectures; Deep learning with hardware accelerators (FPGA/GPU); Estimation models on FPGAs and GPUs


PhD. Candidate, Computer Science

School of Computing, National University of Singapore
Expected Graduation Date: October 2017

Bachelor of Engineering, Microelectronics

School of Physics and Engineering, Sun Yat-sen University, China

2012 - present

2008 - 2012


★ HTcNN: A hybrid-threading library for deep learning on embedded FPGA-based platforms

We are planning to develop a hybrid-threading library for Convolutional Neural Networks (CNNs) on embedded-FPGA devices. The project abstracts hardware (FPGA) accelerators with thread concepts. Hardware threads can cooperate with software threads to fully explore diverse parallelism inside CNN applications on heterogeneous MPSoC architectures. We try to provide a push button solution to automatically decide mapping decisions, provide the optimal hardware optimization trade-off considering multiple layers of CNNs and generate platform-runnable files (i.e., FPGA bitstreams, cpu executable files). I am the team leader in this project. (Status: in progress; hardware threading is done)

★ MPSeeker

An automatic design space exploration framework to suggest the potential best suited configurations for a high-level synthesis tool (Vivado HLS) considering both fine- and coarse-grained parallelism. It targets kernels (nested loops in C/C++) with large input data size (exceeding available FPGA BRAMs). The framework includes an FPGA area estimation model leveraging Gradient Boosted Machine (GBM) and an FPGA performance estimation tool (Lin-Analyzer).

★ Lin-Analyzer

A high-level performance analysis tool for FPGA-based accelerators. It mimics the behavior of Vivado HLS and predicts FPGA performance from C/C++ codes according to optimization pragmas given. It recommends the potential best suited configurations for HLS tools to generate accelerators with good quality. The framework is based on dynamic analysis.

★ Multiple-Target Tracking (MTT) System

MTT is one of the key components in the Advanced Driver Assistance Systems (ADAS). In this project, we provided an efficient hardware & software co-design solution for MTT on an FPGA-based heterogeneous System-on-Chip platform.


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Book Chapters

 Accelerating Data Analytics Kernels with Heterogeneous Computing.

 Guanwen Zhong, Alok Prakash, Tulika Mitra.

 Invited Book Chapter in Emerging Technology and Architecture for Big-data Analytics, Springer 2017 (In press)


 [DATE'2017] Design Space Exploration of FPGA-based Accelerators with Multi-level Parallelism.

 Guanwen Zhong, Alok Prakash, Siqi Wang, Yun Liang, Tulika Mitra, Smail Niar.

 Design Automation and Test in Europe (DATE), March 2017 (Full paper)

 [DAC'2016] Lin-Analyzer: A High-level Performance Analysis Tool for FPGA-based Accelerators.

 Guanwen Zhong, Alok Prakash, Yun Liang, Tulika Mitra, Smail Niar.

 53rd ACM/IEEE Design Automation Conference (DAC), June 2016 (Full paper)

 [ICCD'2014] Design Space Exploration of Multiple Loops on FPGAs Using High Level Synthesis.

 Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smail Niar.

 32nd IEEE International Conference on Computer Design (ICCD), October 2014 (Full paper)

 An early paper when I was an undergraduate working on a competition

 [VLSI-SoC'2011] 1024-point pipeline FFT processor with pointer FIFOs based on FPGA.

 Guanwen Zhong, Hongbin Zheng, ZhenHua Jin, Dihu Chen, Zhiyong Pang.

 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip (VLSI-SoC), October 2011 (Short paper)


 [IEEE-TVT'2016] Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices.

 Guanwen Zhong, Smail Niar, Alok Prakash and Tulika Mitra.

 IEEE Transactions on Vehicular Technology, 2016 (IF'2016: 2.24)


HiPEAC Paper Awards, HiPEAC, 2016
Research Achievement Award, National University of Singapore, 2016
Merlion PhD Scholarship, Institut Français Singapour, 2012
NUS Research Scholarship, National University of Singapore, 2012
Placed First, FPGA-based Electronic Design Competition,Sun Yat-sen University,2010