Vanchinathan Venkataramani

PhD. Candidate


eCO: Embedded COmputing Lab

School of Computing

National University of Singapore

Email: vvanchi@comp.nus.edu.sg



M.Comp, B.Comp (Hons) School of Computing, NUS

Publications

Dissertation

[M.Comp Dissertation] Performance modeling of Adaptive multi-core architecture

Vanchinathan Venkataramani
Master of Computing Dissertation, School of Computing, National University of Singapore, January 2015

Conference Papers

[MCSoC] Scalable Dynamic Task Scheduling on Adaptive Many-Core (Invited Paper)

Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique, Tulika Mitra, Jörg Henkel
12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, September 2018

[CASES] LOCUS: Low-Power Customizable Many-Core Architecture for Wearables

Wearable Benchmark Suite: Parallel and Serial version of representative wearable computational kernels
Cheng Tan, Aditi Kulkarni, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, October 2016
Best Paper Candidate

[DAC] Distributed Scheduling for Many-Cores Using Cooperative Game Theory

Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
53rd ACM/IEEE Design Automation Conference, June 2016

[DATE] Distributed Fair Scheduling for Many-Cores

Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Design Automation and Test in Europe, March 2016

[ICCD] Design Space Exploration of Multiple Loops on FPGAs using High Level Synthesis

Guanwen Zhong, Vanchinathan Venkataramani,Yun Liang, Tulika Mitra, Smail Niar
32nd IEEE International Conference on Computer Design, October 2014

[CASES] Power-Performance Modeling on Asymmetric Multi-Cores

Mihai Pricopi, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin
ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, October 2013

[DAC] Hierarchical Power Management for Asymmetric Multi-Core in Dark Silicon Era

Thannirmalai Somu Muthukaruppan, Mihai Pricopi, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin
50th Design Automation Conference, June 2013

Journals

[ACM-TECS] LOCUS: Low-Power Customizable Many-Core Architecture for Wearables

Cheng Tan, Aditi Kulkarni, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
ACM Transactions on Embedded Computing Systems, 17(1), January 2018 [ACM DL]
Invited: Special Issue on Best Papers from Embedded Systems Week 2016

[IEEE-TCAD] Optimal Greedy Algorithm for Many-Core Scheduling

Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 36(6), June 2017 [ IEEE Xplore ]

[TACO] Defragmentation of Tasks in Many-Core Architectures

Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
ACM Transactions on Architecture and Code Optimization, 14(1), April 2017 [ACM DL]

Invited book Chapter

Power Management of Asymmetric Multi-Cores in the Dark Silicon Era

Tulika Mitra, Thannirmalai Somu Muthukaruppan, Anuj Pathania, Mihai Pricopi, Vanchinathan Venkataramani, Sanjay Vishin
Book chapter in “The Dark Side of Silicon (Computing in the Dark Silicon Era)”, Springer 2016