[Members] [Time&Venue] [Topics] [Schedule]
This reading group is an informal weekly meeting of people interested in embedded systems. It is also intended for MSc/Phd students who wish to explore research possibilities in this exciting emerging area. Each week there will be a presentation on some topic related to embedded systems. The presentation can/will use any medium ranging from white board to powerpoint. The idea is to have lots of discussions and the presenter will lead the discussions.
1. Case Study
Multi-media terminal architecture
Olu Akiwumi-Assani and Marnix Vlot
Philips Journal of Research Volume 50, Issues 1-2 (1996)
Set-top box control software: a key component in digital
video
Kamlesh Rath and James W. Wendorf
Philips Journal of Research Volume 50, Issues 1-2 (1996)
The InfoPad Multimedia Terminal: A Portable Device For Wireless Information Access
T. Truman, T Pering, R. Doering, R. Brodersen.
IEEE Transactions on Computers, vol. 47, no. 10, October 1998, pp. 1073-1087
A large-format thermal inkjet drafting plotter
Robert A. Boeller, Samuel A. Stodder, John F. Meyer & Victor T. Escobedo
Hewlett-Packard Journal 43(6), pp. 6-15, December 1992.
Electronic and firmware design of the HP DesignJet drafting plotter
Alfred Holt Mebane, IV, James R. Schmedake, Iue-Shuenn Chen & Anne P. Kadonaga
Hewlett-Packard Journal 43(6), pp. 16-23, December 1992.
Design and Implementation of a Robot Control System Using a Unified Hardware-Software Rapid Prototyping
Framework
Mani B. Srivastava, Trevor I. Blumenau, Robert W. Brodersen
ICCD 1992: 124-127
A) The classic paper on Statecharts
Statecharts: A Visual Formulation for Complex Systems
David Harel
Science of Computer Programming 8(3): 231-274 (1987)
B) Work on SpecC/ADL etc.
IP-centric Methodology and Design with the SpecC Language
Daniel D. Gajski, Rainer Dömer, Jianwen Zhu
Chapter 10 in System-Level Synthesis, Proceedings of the NATO ASI on System Level Sythesis for Electronic Design, Il
1998
IP-centric Methodology and Specification
Language
Daniel D. Gajski, Rainer Dömer, Jianwen Zhu
Distributed and Parallel Embedded Systems, Kluwer Academic Publishers,
1999
Specification and Design of Embedded Hardware-Software Systems
D.D. Gajski, F. Vahid,
IEEE Designs & Test of Computers, Vol. 12, No. 1, 1995, pp. 53-67
A survey of Architecture description languages
P. Clements
CODES 1996
C) Papers on Time triggered and its predecessor/successors
The Design of Large Real-Time Systems: The Time-Triggered Approach
Hermann Kopetz, Martin Braun, Christian Ebner, Andreas Krüger, Dietmar Millinger, Roman Nossal, Anton Schedl
Proceedings of the 16th Real-Time Systems Symposium, 1995
The Programmer's View of MARS
Hermann Kopetz, Gerhard Fohler, Günter Grünsteidl, Heinz Kantz, Gustav Pospischil, Peter Puschner, Johannes Reisinger, Ralf Schlatterbeck, Werner Schütz, Alexander Vrchoticky, Ralph Zainlinger
Proceedings of the 13th Real-Time Systems Symposium, p.223-226, December 1992
Giotto: A Time-Triggered Language for Embedded
Programming
Thomas A. Henzinger, Benjamin Horowitz, Christoph Meyer Kirsch
EMSOFT 2001: 166-184
D) More theoretical papers
Modular Specification of Hybrid Systems in CHARON
Rajeev Alur, Radu Grosu, Yerang Hur, Vijay Kumar, and Insup Lee
HSCC 2000: 6-19
The Esterel Synchronous Programming Language: Design, Semantics,
Implementation
Gérard Berry, Georges Gonthier
Science of Computer Programming 19(2): 87-152 (1992)
Combining UML and formal notations for modeling real-time systems
L. lavazza, G. quaroni and M. Venturelli
FSE 2001.
3. Verification
Translation Validation
Amir Pnueli, Michael Siegel, Eli Singerman
TACAS 1998: 151-166
Verification of Real-Time Embedded Systems using Petri Net Models and Timed
Automata
Luis A. Cortes, Petru Eles and Zebo Peng
Proc. 8th International Conference on Real-Time Computing Systems and Applications, RTCSA 2002.
Verification of Embedded Systems using a Petri Net based
Representation
Luis A. Cortes, Petru Eles and Zebo Peng
Proc. 13th International Symposium on System Synthesis (ISSS 2000).
Formal modeling and analysis of hybrid systems: A case study in multirobot
coordination
R. Alur, J. Esposito, M. Kim, V. Kumar, and I. Lee
FM'99: Proceedings of the World Congress on Formal Methods, LNCS 1708, pp. 212--232, Springer, 1999.
Formal Design and Analysis of a Gear Controller
Magnus Lindahl, Paul Pettersson and Wang Yi.
International Workshop on Tools and Algorithms for the Construction and Analysis of Systems. Gulbenkian Foundation, Lisbon, Portugal, 31 March - 2 April, 1998. Lecture Notes in Computer Science, Volume 1384, pages 281-297, Bernhard Steffen (Ed.), Springer-Verlag 1998.
Formal Verification of UML StateCharts with real-time extensions
A. David, M.O. Moller and Wang Yi
FASE 2002.
4. Custom Processors
Embedded Computer Architecture and Automation
B.R. Rau and M. S. Schlansker
IEEE Computer 34, 4 (2001), 75-83.
http://www.hpl.hp.com/research/itc/car/Templates/carpapers-hpl.html
Lx: A Technology Platform for Customizable VLIW Embedded Processing.
Faraboschi, Paolo, Brown, Geoffrey, Fisher, Joseph A, Desoli,
Giuseppe, Homewood, Fred.
International Symposium on Computer Architecture (ISCA-2000)
Xtensa: A configurable and extensible
processor
R. E. Gonzalez.
IEEE Micro, 20(2):60--70, March-April 2000
On the limits of processor specialisation by mapping dataflow sections on ad-hoc functional
units
Paolo Ienne, Laura Pozzi, and Miljan Vuletic.
Technical Report 01/376, Swiss Federal Institute of Technology Lausanne
(EPFL), Computer Science Department (DI), Lausanne, December 2001.
http://diwww.epfl.ch/lap/publications/IenneDec01.pdf
5. Re-configurable Logic
The Garp Architecture and C Compiler
Timothy J. Callahan, John R. Hauser, and John Wawrzynek.
IEEE Computer, April 2000.
PipeRench: A reconfigurable architecture and compiler
S. C. Goldstein, H. Schmit, M. Budiu, M. Moe, and R. R. Taylor
Computer 33(4) pp. 70--77, April 2000.
Programmable active memories: Reconfigurable systems come of
age
J. Vuillemin, P. Bertin, D. Roncin, M. Shand, H. Touati and P. Boucard.
IEEE Transactions on VLSI Systems, 4(1): 56-59, 1996.
Improving Software Performance with Configurable Logic
J. Villarreal, D. Suresh, G. Stitt, F. Vahid and W. Najjar
To appear in Kluwer Journal on Design Automation of Embedded Systems, 2002.
http://www.cs.ucr.edu/~vahid/pubs/daes02_dsp.pdf
6. Design Space Exploration
System-level Exploration for Pareto-optimal Configurations in Parameterized
System-on-a-chip
T. Givargis, F. Vahid and J. Henkel
IEEE Transactions on VLSI Systems, to appear.
http://www.cs.ucr.edu/~vahid/pubs/tvlsi02_tune_sub.pdf
Estimation of Speed, Area, and Power of Parameterizable, Soft IP
Jagesh Sanghavi and Albert Wang
Design Automation Conference (DAC) 2001
Soft-cores generation by instruction set
analysis
Alessandro Fin, Franco Fummi, Giovanni Perbellini
Internation Symposium on Systhem Synthesis (ISSS) 2001: 227-232
Multi-Objective Design Space Exploration Using Genetic Algorithms
M.Palesi, Tony Givargis
International Symposium on Hardware/Software Codesign (CODES) 2002
7. Real time systems
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
C. L. Liu, James W. Layland
JACM 20(1): 46-61 (1973)
Reliable and Precise WCET Determination for a Real-Life Processor.
Christian Ferdinand, Reinhold Heckmann, Marc Langenbach, Florian Martin, Michael Schmidt, Henrik
Theiling, S. Thesing, Reinhard Wilhelm
First International Workshop on Embedded Software (Emsoft) 2001, 469-485
Performance Estimation for Real-Time Distributed Embedded
Systems
Ti-Yen Yen, Wayne Wolf
IEEE Transactions on Parallel and Distributed Systems 9(11): 1125-1136(1998)
Rate Analysis for Embedded Systems
Anmol Mathur, Ali Dasdan and Rajesh K. Guptahttp://www.cs.uiuc.edu/Dienst/UI/2.0/Describe/ncstrl.uiuc_cs/UIUCDCS-R-96-1954
8. Low power
Power analysis of embedded software: A first step towards software power
minimization
V. Tiwari, S. Malik, and A. Wolfe.
IEEE Transactions on VLSI Systems, 2(4):437-445, December 1994.
JouleTrack - A Web Based Tool For Software Energy Profiling
Amit Sinha and Anantha Chandrakasan.
Design Automation Conference (DAC) 2001.
http://dry-martini.mit.edu/JouleTrack/
Energy-driven integrated hardware-software optimizations using
Simple Power
N. Vijaykrishnan et. al.
International Symposium on Computer Architecture (ISCA), 2000
System-level power optimization: techniques and tools
Luca Benini and Giovanni de Micheli
ACM Transactions on Design Automation of Electronic Systems (TODAES) Volume 5, Issue 2 (April 2000)
http://portal.acm.org/citation.cfm?doid=335043.335044
9. Compression
Executing compressed programs on an embedded RISC
architecture
A. Wolfe and A. Chanin.
Int'l Symp. on Microarchitecture (MICRO) 1992.
An Introduction to Thumb
ARM.
http://www.arm.com/sitearchitek/armwww.ns4/img/12-Tech+Ref+Manuals-Thumb_intro/$File/Thumb_intro.pdf?OpenElement
Code compression for low power embedded system
design
H. Lekatsas, Joerg Henkel, and Wayne Wolf.
ACM/IEEE Design Automation Conference (DAC), 2000.
Profile-guided code
compression
Saumya Debray and William Evans.
Programming Languages Design and Implementation (PLDI) 2002.
Compiler techniques for code
compaction
Saumya Debray, William Evans, Robert Muth, and Bjorn de Sutter.
ACM Transactions on Programming Languages and Systems, 22(2):378-415, 2000.
Combining global code and data
compaction
Bjorn de Sutter, Bruno de Bus, Koen de Bosschere, and Saumya Debray.
ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems
(LCTES) 2001.
10. Code Generation
Chess : retargetable code generation for embedded DSP
processors
D. Lanneer, J.Van Praet, A.Kifli, K. Schoofs, W.Geurts, F.Thoen, G.Goossen
Code generation for embedded processors, pp. 85--102, Kluwer Acad. Publ.1995
A Retargetable Compilation Methodology for Embedded DSP Using a Machine-Dependent Code Optimization Library
A. Sudarsanam, S. malik, and M. Fujita,
Kluwer Design Automation for Embedded Systems, 4 (2/3) March 1999.
Retargetable code generation based on structural processor
descriptions
R. Leupers and P. Marwedel.
Design Automation for Embedded Systems, 3(1), 1998.
Compiler Design Issues for Embedded
Processors
Rainer Leupers.
IEEE Design & Test of Computers, July 2002.
11. Memory optimization
Memory data organization for improved cache performance in embedded processor
applications
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
TODAES 2(4): 384-409 (1997)
On-chip vs. off-chip memory: the
data partitioning problem in embedded processor-based systems
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau
TODAES 5(3): 682-704 (2000)
Storage Allocation for Embedded Processors
Jan Sjodin and Carl von Platen
CASES 2001
Heterogeneous Memory Management for Embedded Systems
Oren Avissar, Rajeev Barua, and Dave Stewart
CASES 2001
| Topic | Presenter | Material |
| Introduction | Tulika Mitra | ppt |
| Case Study: Set-top Box | Hemendra Negi |
Multi-media terminal architecture, Olu Akiwumi-Assani and Marnix Vlot. Philips Journal of Research Volume 50, Issues 1-2 (1996) Set-top box control software: a key component in digital video, Kamlesh Rath and James W. Wendorf. Philips Journal of Research Volume 50, Issues 1-2 (1996) |
| Real-time System | Li Xianfeng |
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Performance Estimation for Real-Time Distributed Embedded
Systems |
| Memory Management | Kumar Karthik Subramanian | ppt
Heterogeneous Memory Management for Embedded Systems |
| Power | Wong Weng Fai | Power Issues in Embedded Systems |
| Memory Management | Xie Lei | ppt
Storage Allocation for Embedded Processors |
| Re-configurable Logic | Liao Jirong |
ppt
The Garp Architecture and C Compiler |
| Design Space Exploration | Abhik Roychoudhury | Estimation and Exploration of Embedded System Designs |
| Specification | P. S. Thiagarajan | Communicating Transaction Processes |
| Custom Processors | Tulika Mitra | Automated Design of Custom Architecture |