Hi! I am a PhD student at KISP Lab, School of Computing, National University of Singapore. I am working with Prof Prateek Saxena on system security. I am interested in the design of secure computer architectures with features such as full memory safety and fine-grained isolation. I have examined limitations of existing Trusted Execution Environment designs in terms of security and expressiveness. My prior work has included the uncovering of SmashEx, an attack that exploits vulnerabilities in asynchronous interfaces of SGX runtimes, and the creation of Elasticlave, an enclaved TEE design that enables safe and flexible inter-enclave memory sharing. The main projects I am currently working on are: Capstone, a capability-based architecture providing a unified foundation for building secure systems, and AnvilHDL, a hardware description language which enforces timing safety with dynamic timing contracts.
Check out my CV for more details about me!