Trevor Erik CARLSON
Assistant Professor- Ph.D. (Computer Science, Ghent University)
- M.Sc. (Electrical & Computer Engineering, Carnegie Mellon University)
- B.Sc. (Electrical & Computer Engineering, Carnegie Mellon University)
Trevor E. Carlson is an Assistant Professor of Computer Science at the School of Computing at the National University of Singapore (NUS). He earned B.S. and M.S. degrees in Electrical and Computer Engineering from Carnegie Mellon University in 2002 and 2003, and his Ph.D. in Computer Science Engineering from Ghent University in 2014. His research interests include highly-efficient microarchitectures, hardware/software co-design, performance modeling and fast and scalable simulation methodologies. Through the use of fast bottleneck analysis and simulation, his goal is to improve both performance and efficiency of next-generation processors. Dr. Carlson has over a decade of computer architecture experience covering both industry and academia. While a staff engineer at IBM from 2003 and 2007, he helped to author 4 issued patents. During his PhD, in collaboration with the Intel ExaScience Lab, he co-developed the Sniper Multi-core Simulator which is being used by hundreds of researchers to evaluate the performance and power-efficiency of next generation systems. As a researcher at imec, Belgium, and as a postdoctoral researcher at Uppsala University, Sweden, he investigated processor architectures to more efficiently handle long-latency memory accesses. Dr. Carlson’s research has been published at leading journals and conferences in computer architecture and simulation such as the International Symposium on Computer Architecture, the International Symposium on Microarchitecture, the International Symposium on High Performance Computer Architecture and the International Symposium on Performance Analysis of Systems and Software. Dr. Carlson has received a number of awards for his research into simulation, sampling and modeling. He is a recipient of the Best Paper Award at the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation in 2016, and the Best Paper Award at the International Symposium on Performance Analysis of Systems and Software in 2013. In addition, he has received two Best Paper Award nominations, one from the International Symposium on Performance Analysis of Systems and Software in 2015 and one from the International Symposium on Performance Analysis of Systems and Software in 2014. He was selected to attend the Heidelberg Laureate Forum as an outstanding young researcher with Turing, Fields and Abel Award winners in 2015, and his work with the Sniper Multi-Core Simulator received the HiPEAC Technology Transfer Award in 2013.
RESEARCH AREAS
RESEARCH INTERESTS
Computer Architecture (Focusing on Efficiency and Flexibility)
Performance Modeling
Fast and Scalable Simulation Methodologies
RESEARCH PROJECTS
Compiler-Guided High-Performance Accelerator Design
Project aims to optimize FPGA acceleration through DSL platform. It facilitates efficient, easy-to-develop designs via compiler-based generators. The goal is high-efficiency, easy deployment, and specialized FPGA designs through abstraction-level optimizations.
RESEARCH GROUPS
TEACHING INNOVATIONS
SELECTED PUBLICATIONS
- Ros, A., Carlson,T.E., Alipour, M., and Kaxiras, S., “Non-Speculative Load-Load Reordering in TSO”, in Proceedings of the 44th Annual International Symposium on Computer Architecture ISCA,Toronto, Canada,June 24-28, 2017. DOI:10.1145/3079856.3080220
- Nikoleris, N., Sandberg, A., Hagersten, E., and Carlson, T.E., "CoolSim: Statistical Techniques to Replace Cache Warming With Efficient, Virtualized Profiling”, in2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation SAMOS, Agios Konstantinos, Greece, July 17-21, 2016. DOI:10.1109/SAMOS.2016.7818337 [Best Paper Award]
- Sembrant, A., Carlson, T., Hagersten,E., Black-Shaffer, D., Perais, A., Seznec, A., and Michaud, P., “Long Term Parking LTP: Criticality-aware Resource Allocation in OOO Processors”, in Proceedings of the 48th International Symposium on Microarchitecture MICRO,Waikiki, HI, USA, December 5-9, 2015. DOI:10.1145/2830772.2830815
- Carlson T. E., Heirman, W., Allam, O., Kaxiras, S. and Eeckhout, L., “The Load Slice Core Microarchitecture”, in Proceedings of the 42nd Annual International Symposium on Computer ArchitectureISCA,Portland, OR, USA, June 13-17, 2015. DOI:10.1145/2749469.2750407
- Van den Steen, S., Pestel, S. D., Mechri, M., Eyerman, S., Carlson, T.E., Black-Schaffer, D., Hagersten, E., and Eeckhout, L., “Micro-architecture Independent Analytical Processor Performance and Power Modeling”, International Symposium on Performance Analysis of Systems and Software ISPASS,Philadelphia, PA, USA, March 29-31 2015. DOI:10.1109/ISPASS.2015.7095782 [Best Paper Award nominee]
- Carlson, T. E., Heirman, W., Eyerman, S., Hur, I., and Eeckhout, L., "An Evaluation of High-Level Mechanistic Core Models”,ACM Transactions on Architecture and Code Optimization TACO, 113 2014, October, pp.28:1-28:25. DOI:10.1145/2629677
- Carlson, T.E., Heirman,W., Craeynest, K.V., and Eeckhout, L., “BarrierPoint: Sampled Simulation of Multi-threaded Applications”,in 2014 IEEE International Symposium on Performance Analysis of Systems and Software ISPASS,Monterey, CA, USA, March 23-25 2014. DOI:10.1109/ISPASS.2014.6844456 [Best Paper Award nominee]
- Heirman, W., Carlson, T.E., Van Craeynest, K., Hur, I., Jaleel, A. and Eeckhout, L., “Undersubscribed Threading on Clustered Cache Architectures”, in 2014 IEEE 20th International Symposium on High Performance Computer Architecture HPCA,Orlando, FL, USA, February 15-19 2014. DOI:10.1109/HPCA.2014.6835975
- Carlson, T.E., Heirman, W., and Eeckhout, L., “Sampled Simulation of Multi-Threaded Applications”, in 2013 IEEE International Symposium on Performance Analysis of Systems and Software ISPASS,Austin, TX, USA, April 21-23 2013. DOI:10.1109/ISPASS.2013.6557141 [Best Paper Award]
- Carlson, T.E., Heirman, W., and Eeckhout, L., “Sniper: Exploring the Level of Abstraction for Scalable and Accurate Parallel Multi-Core Simulations”, in Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and AnalysisSC,Seattle, WA, USA, November 12-18, 2011. DOI: 10.1145/2063384.2063454
AWARDS & HONOURS
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, Best Paper Award (2016)
Selected to attend the Heidelberg Laureate Forum as an outstanding young researcher with Turing, Fields and Abel Award winners (2015)
International Symposium on Performance Analysis of Systems and Software, Best Paper Award nominee (2015)
International Symposium on Performance Analysis of Systems and Software, Best Paper Award nominee (2014)
Received the HiPEAC Technology Transfer Award for the successful collaboration with Intel regarding the Sniper Multi-core Simulator (2013)
International Symposium on Performance Analysis of Systems and Software, Best Paper Award (2013)
MODULES TAUGHT
CS4223
Multi-core Architectures
CS5222
Advanced Computer Architecture