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Memory Stage

Requirements

Only the load/store instructions need to perform operation in this stage. As for other instructions, this stage will not do anything. We will use the memory address calculated by the ALU stage.

  1. Read calculated address from ALU stage and data to be stored (if any) from decode stage).

  2. Read from memory or write to memory (never both).

  3. Either the data read from memory or calculated from ALU stage will be passed to the next stage (i.e., writeback stage).

Block Diagram

Memory Stage

Again, it is rather straightforward because most of the work is done by the Data Memory. This will be explained on the second half of the semester.

Load

Memory Load

Store

Memory Store

Non-Memory

Non-Memory

MemToReg Multiplexer

The MemToReg multiplexer is inverted. In particular:

  • Read Data: 1
  • ALU result: 0

Elements

Data Memory

Data Memory

Data Memory is a storage element for the data similar to Instruction Memory. However, unlike Instruction Memory, we have two control signals to determine whether we will write to memory, read from memory or neither. Note that we will not both read and write at the same time.

Functional Conceptual View of Data Memory
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/* Note:
    Assume word-aligned
*/
Word Mem[1073741824]; // 2^32 ÷ 4 (word-aligned)
Word read_mem(uint addr, bool MemRead) {
  if(MemRead == 1) {
    return Mem[addr/4];
  } else {
    return ?; // can be any random value, no guarantee
  }
}
void write_mem(uint addr, uint data, bool MemWrite) {
  if(MemWrite == 1) {
    Mem[addr/4] = data;
  }
}